Skill UI

This skill structures raw invention ideas into formal invention disclosures suitable for patent applications. It applies the Problem-Solution-Advantage framework to define technical problems, solutions, and advantages. The process includes invention decomposition into core, supporting, and optional features, identifying claimable subject matter, and planning technical drawings. It validates the structure using external reviewer models to ensure patent readiness and proper claim hierarchy.

This comprehensive guide outlines best practices for achieving rigorous scientific reproducibility, especially for research involving storage systems and hardware dependencies. It mandates documenting not only the code but also the specific device models, firmware versions, operating states, and full measurement protocols to ensure verifiable results by peer readers.

This guide details the unique two-deadline review model of SenSys. It provides authors with a comprehensive roadmap for interpreting complex rejection outcomes, structuring substantive revisions, formulating effective responses to reviewers, and understanding critical systems review criteria, such as energy measurement and baseline fairness. Essential reading for systems researchers.

This guide details the rigorous academic review process for ACM Symposium on Cloud Computing (SoCC) submissions. It explains the dual-anonymous, two-round review structure, the importance of incorporating both systems performance and data measurement rigor (including tail latency and cost), and how the rebuttal period functions. Essential reading for authors aiming to publish in top-tier cloud computing venues.

A comprehensive framework for authorized security assessments of Operational Technology (OT) and Industrial Control Systems (ICS). It emphasizes a 'passive-first' approach, covering Purdue model zoning, analyzing industrial protocols (Modbus, DNP3, etc.), and identifying exposure points on SCADA/DCS environments. The methodology strictly avoids disruptive write operations on PLCs, prioritizing read-only validation and safe network analysis for physical safety.

Design custom laboratory hardware components using parametric Python models with build123d. Export fabrication-ready files like STEP, STL, and DXF for microfluidic chips, mounts, and adapters. Ensure precise interface dimensions against standards for compatibility with lab equipment. Use for physical parts mating with standardized labware, optical tables, or manufacturing processes.