Skill UI

Hallmark is a specialized design skill for AI coding assistants, designed to ensure that generated UIs look genuinely crafted, not machine-generated. It combats the 'AI-slop' aesthetic by mandating structural variety. Users can leverage it for fresh greenfield page builds, auditing existing designs against anti-patterns, redesigning visuals while preserving component architecture, or extracting core design DNA from URLs and screenshots. It is a comprehensive tool for professional UI/UX refinement.

A comprehensive guide for strengthening the methodological rigor of academic manuscripts, particularly for high-stakes journals. It covers advanced techniques for causal identification (e.g., Difference-in-Differences, Instrumental Variables, Regression Discontinuity), pre-analysis planning, linking theory to empirical tests, and defending claims against skeptical reviewers. This skill focuses on methodological architecture, not code.

This guide provides expert principles for designing and auditing system-level experiments in computer architecture (e.g., for ASPLOS-level conferences). It details the proper usage of various instruments—from real silicon and FPGAs to cycle-level simulators and analytical models—ensuring that every claim is matched to a valid, stated error model. It emphasizes workload selection, establishing strong baselines, performing rigorous ablation studies, and honestly reporting measurement noise and limitations to maintain scientific credibility.

A detailed model of the ACM/IEEE Design Automation Conference (DAC) research manuscript review process. This guide explains the double-blind, TPC-driven, and single-shot nature of the evaluation, emphasizing the critical balance between genuine novelty and measured Quality-of-Results (QoR). It outlines the high standards for evidence fairness, benchmark credibility, and ablation studies required for acceptance, differentiating DAC's approach from architecture and software venues.

A comprehensive guide for auditing and improving the scientific rigor of hardware architectural evaluations (e.g., HPCA style). It emphasizes establishing a clear 'fidelity contract' defining tools, scope, and configurations. It requires that all performance claims are backed by credible instruments, mandates capturing full machine state provenance, ensuring honest baseline tuning, and reporting results via per-workload distributions rather than single means.

A detailed guide on positioning a computer architecture paper within the broader academic literature. It teaches authors to write a 'lineage with structural deltas,' moving beyond mere citation lists. The guidelines cover sweeping multiple databases (like dblp and IEEE Xplore), identifying concrete structural improvements (deltas), and adhering to strict academic rules, such as citing all authors and maintaining un-blinded bibliography integrity.

This guide outlines the rigorous methodology for ensuring that computational research results, especially those involving hardware architecture and simulation, are fully reproducible. It emphasizes pinning the entire result chain—from simulator commits and configuration files to workloads, sampling recipes, and statistics scripts—and mandates creating a manifest for every figure. Key practices include recording machine state for silicon runs and containerizing the environment to prevent data drift.

This guide provides rigorous structural and stylistic guidelines for writing top-tier academic papers in computer architecture (specifically for HPCA). It emphasizes building arguments around a single, measurable mechanism-to-behavior claim, quantifying the motivation with measured costs, ensuring all proposed mechanisms are checkable, and making sure every performance number is anchored to a specific instrument or simulation environment. It details the essential 'first-page arc' structure.

This guide details the advanced methodology for structuring the 'Related Work' section for top-tier academic conferences (e.g., ASPLOS). It emphasizes positioning research across multiple parallel domains—including architecture, OS/systems, compilers, and accelerators—and defining the precise technical boundary where your work advances the state of the art.

A comprehensive guide for researchers determining if their cross-layer systems work belongs at ASPLOS or a specialized venue (e.g., ISCA, SOSP, PLDI). It introduces the crucial "deletion test," a routing table based on core claims (microarchitecture, language design, etc.), and criteria for identifying genuine cross-disciplinary intersections between OS, PL, and Architecture.

A comprehensive guide for authors targeting the IEEE International Conference on Data Engineering (ICDE). This skill helps assess venue fit, re-frame manuscripts from journal/arXiv styles, and structure papers for top CS conferences. It details required evidence (system architecture, realistic workloads) and best practices for positioning contributions in data engineering, database systems, and analytics.

A comprehensive guide for authors submitting computer architecture papers to ISCA. It details the scope fit, required evidence (simulation or hardware), effective framing strategies, and provides comparisons with similar top-tier venues (like MICRO, HPCA). It helps authors refine their manuscript to meet the rigorous standards of a flagship conference.