Skill UI

This skill automates the Design Space Exploration (DSE) process, crucial for computer architecture and Electronic Design Automation (EDA). It runs complex simulations, analyzes performance metrics, and systematically tunes parameters (e.g., cache size, pipeline width) across a defined parameter space. It iterates until the objective metric is optimized or a defined timeout is reached, making it ideal for complex hardware tuning and system design.

CHIPSEC is an open-source framework designed to assess the low-level security configuration of x86 platform firmware and hardware. It verifies critical security controls such as SPI flash write protection, BIOS locks, SMM/SMRR configuration, and Secure Boot variable integrity. Users can run automated tests, dump SPI flash memories for forensics, and detect potential firmware implants that persist below the operating system layer.

This tool is designed to register a Cognitum Seed IoT device, establishing a secure agent bridge and fetching the device's identity. It resolves the specified or default endpoint for connectivity and handles initial trust level assignment. It is crucial for the initial setup, pairing, and status checking of IoT hardware deployments.

A comprehensive guide for researchers in electronics and signal processing preparing submissions to Acta Electronica Sinica (AES). It outlines best practices for proactively structuring, documenting, and disclosing research artifacts—including code, datasets, and hardware designs—to maximize the paper's credibility and chances of acceptance, even without mandatory journal badges. Covers anonymization, reproducibility standards, and proper disclosure in the manuscript.

This guide provides comprehensive standards for designing, executing, and reporting systems experiments for top-tier academic venues (like ICDE). It emphasizes methodological rigor, including mandatory ablation studies, reporting variance and tail latency (p99), demonstrating scaling trends (curves over points), disclosing cost trade-offs, and ensuring full hardware and software reproducibility to withstand adversarial review.

A comprehensive guide for designing and auditing rigorous experiments for sensing systems and information processing claims. It emphasizes the necessity of measuring performance on real hardware (not simulation), accurately instrumenting ground truth, quantifying energy consumption, latency, and physical footprint, and establishing fair, skeptical baselines. This ensures scientific rigor and reproducibility in research submissions.

A comprehensive guide designed to help researchers determine the optimal top-tier conference venue for their computer architecture work. It provides detailed criteria—such as mechanism-residency tests, hardware cost analysis, and scope boundaries—to guide authors in correctly placing their research between venues like MICRO, ISCA, ASPLOS, and DAC.

A comprehensive guide for submitting research artifacts to the MobiSys Artifact Evaluation Committee (AEC). It details the process for achieving three independent ACM badges (Available, Functional, Results Reproduced). Emphasis is placed on creating fully reproducible, script-first workflows, designing for hardware-optional environments, and maintaining strict anonymity during review.

This guide provides a comprehensive audit checklist for designing and evaluating sensor-based systems (SenSys). It mandates rigorous, real-world measurements across five core axes: energy efficiency, on-device latency distribution, ground truth accuracy, deployment realism, and embedded AI footprint. It ensures that research results are based on measured hardware performance, not simulations or idealized baselines.

A comprehensive guide for authors submitting to high-impact scientific journals. It outlines the essential principles for structuring experiments and presenting evidence, emphasizing claims-evidence matching, fair benchmarking, differentiating result sources (simulation, hardware, theory), and ensuring statistical rigor. Covers best practices across computer science, control, communication, and microelectronics.

A comprehensive guide detailing how to package and present research artifacts—including code, hardware designs, and datasets—for major academic conferences. It outlines best practices for both initial review-time evidence and long-term public reuse, ensuring reproducibility and maximizing the chances of adoption by future builders.

Design custom laboratory hardware components using parametric Python models with build123d. Export fabrication-ready files like STEP, STL, and DXF for microfluidic chips, mounts, and adapters. Ensure precise interface dimensions against standards for compatibility with lab equipment. Use for physical parts mating with standardized labware, optical tables, or manufacturing processes.